Static Random Access Memory (SRAM) is a type of semiconductor memory that uses bi-stable latching circuitry to store each bit. SRAM is used as data storage in many electronic devices and is often used to implement programmable logic integrated circuits (ICs).
An SRAM cell can be written to or read from. Generally, an SRAM cell provides a voltage at an output port and a sense amplifier senses whether the voltage held in the SRAM represents a digital value of 1 or a digital value of 0. Some SRAM cells have a single port used to both write data in and read data out. Other SRAM cells have multiple ports which can be used in a variety of ways and for various purposes. In some ICs, multi-port SRAM cells may be operated in single-port or multi-port mode.
ICs that have SRAM arrays are being implemented with increasingly denser and denser process technologies. The result is higher and higher bit density per IC. Any memory system is susceptible to random up-sets which result in the flipping of bits and faulty operation. The Failure in Time (FIT) rate of memories is measured in failures per megabits per 10^12 seconds. The Mean Time to Failure (MTBF) is inversely proportional to the product of memory density, ICs per system, and FIT. If the memory density of ICs are increases but FIT and ICs per system stay constant the MTBF of systems using the ICs will drop to unacceptable levels. In designing ICs with increasingly higher bit counts it becomes necessary to find ways to reduce the cell FIT proportional to the density increase. Many design decisions will be driven by improving memory density and some will be driven by the need to improve FIT.